In a transistorized master slave flip-flop circuit operated in the divide-by-two mode a first gate circuit which controls the master flip-flop is itself controlled both by clock signals and by the output of the slave flip-flop. A second gate circuit is provided to control the slave flip-flop and it is also controlled by the clock signals as well as by the output of the master flip-flop. Quite often these master slave flip-flop circuits are formed by integrated circuit techniques to decrease their size, increase their reliability and improve their performance.
Many of the prior art master slave flip-flops have encountered the problem that in the instance of a change of state of one flip-flop its associated voltage, which is applied through a gate circuit to the other flip-flop, is also changed and may result in an unstable state or incorrect state switching. It has been a common practice in prior art bipolar master slave flip-flops to provide a voltage offset within each flip-flop to create two different switching thresholds for the clock transistors in the flip-flops. One prior art technique has been to generate two distinct voltage levels which are routed through separate lines to one of the transistors in the master flip-flop and one of the transistors in the slave flip-flop. This creates separate switching levels for the gate circuits and by creating a preferred, stable state will inhibit any erroneous changes in the flip-flops caused by simultaneous switching of both, master and slave circuit elements. These different voltage thresholds are normally supplied by a voltage source external to the integrated circuit of the flip-flop but still within the monolithic implementation. It is apparent that such a method of inhibiting erroneous changes in state requires additional crossovers within the integrated circuit of the master slave flip-flop to route the voltages to the proper transistors and will thus increase the complexity of the circuit. It is also expensive and cumbersome to utilize an additional separate voltage source. There are obvious shortcomings in this prior art technique due to the increased complexity of the integrated circuit and the heat generated by the additional voltage source.
A second technique was developed in the prior art to establish a voltage offset between the bipolar transistors in the master slave flip-flop. This technique contemplated the use of additional resistors within the master slave flip-flop circuits to create the voltage offset. A resistor would be placed in one side of the current switch if it is the master flip-flop and with an additional resistor being placed in the other side of the current switch of the slave flip-flop to thereby generate with extra components the required offset. While this technique does not require any additional crossovers within the integrated circuit it does require the fabrication of additional circuit elements within each flip-flop circuit. The presence of the resistor slows down the operation of the current switch, increases the component count on the chip and further complicates the fabrication process.
A third prior art technique has been developed in master slave flip-flops which are fabricated from MOS transistors or other insulated-gate field-effect transistors. The required offset is provided by a suitable choice of the length-width ratio of the channels in the field effect transistors within the gate circuit to thereby provide the required load resistances. It is apparent, however, that this technique cannot be employed in master slave flip-flops which are fabricated from bipolar transistors.